An effective framework to evaluate dynamic partial reconfiguration in FPGA systems. Performance of partial reconfiguration in FPGA systems: A survey and a cost model. In Proceedings of the IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM’07). Methodology and experimental setup for the determination of system-level dynamic reconfiguration overhead. Waveguide metatronics: Lumped circuitry based on structural dispersion. In Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP’19). Photonic processor for fully discretized neural networks. Electronics Resurgence Initiative: Investments Architectures Thrust. Defense Advanced Research Project Agency.As such, ROC can be a viable reconfigurable, approximate computer with the potential for more precise results when replacing silicon-photonics building blocks with nanoscale photonic lumped-elements. Further, it comes within approximately 90% precision of current numerical solvers.
Numerically validated experimental results show that, over multiple configurations, ROC can achieve several orders of magnitude improvement over state-of-the-art GPUs when speed, power, and size are taken into account. The time to obtain the PDE solution then only depends on the time-of-flight of a photon through the programmed mesh, which can be on the order of 10’s of picoseconds given the millimeter-compact integrated photonic circuit. Instead of using actual electrical circuits, the physical underlying hardware emulates such structures using a silicon-photonics mesh that splits light into separate pathways, allowing it to add or subtract optical power analogous to programmable resistors. Instead of solving problems iteratively, the proposed engine uses a resistive mesh architecture to solve a PDE in a single iteration (one-shot). PDE solvers form the basis for many traditional simulation problems in science and engineering that are currently performed on supercomputers. To this end, we introduce ROC, a reconfigurable optical computer that can solve partial differential equations (PDEs). To enable these emerging architectures with high-performance and at ultra-low power, both parallel computation and inter-node communication on-the-chip can be supported using photons. Non-von Neumann architectures are needed to support future computations through innovative post-Moore’s law architectures. Computing systems are increasingly facing power and performance challenges due to both device- and circuit-related challenges with resistive and capacitive charging. Due to the end of Moore’s law and Dennard scaling, we are entering a new era of processors.
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